1. Field of the Invention
The present invention generally relates to the field of integrated circuit technology, and more specifically the invention relates to a method in the fabrication of an integrated injection logic circuit, and to an integrated injection logic circuit.
2. Description of Prior Art
BiCMOS technology combines bipolar and CMOS devices on a single chip. BiCMOS technology has proven to be very useful for the increased integration in circuits used for telecommunications, in particular wireless applications, since bipolar devices are widely utilized for high-frequency parts, e.g. for analog radio functions, while CMOS technology is used for digital and mixed signal parts, such as data interfaces with other circuits in the systems. CMOS technology is also advantageous for logic circuits because of the high device density area and the low power consumption during switching. Therefore BiCMOS technology has been used during the last decade for increased integration of basically bipolar circuit blocks, which interface to digital blocks.
The BiCMOS processes used for wireless applications can be characterized as high-end BiCMOS processes, where a CMOS process is added to an existing high-performance bipolar process. Performance, not cost, is prioritized in contrary to the low-end BiCMOS which adds moderate-speed bipolar transistors into a high-performance CMOS process. U.S. Pat. No. 6,610,578 by Norström et al. and the international patent publication WO 02/091463 A1 by Johansson et al. describe high-performance double-poly bipolar processes for high frequency radio applications which are extendable to BiCMOS with only minor modifications to the bipolar process. The design of a lateral PNP transistor in such a process is described in the above U.S. patent.
Integrated-injection logic (I2L or Multi-Transistor Logic MTL) was invented in the early 1970's. The technology offers high packing density, low power consumption, simple manufacturing technology, and good current drive ability, and can easily be mixed with linear functions and other types of logic on the same wafer. The basic I2L cell consists of a lateral PNP transistor Q1 and a vertical multicollector NPN transistor Q2 tightly connected (super integrated). This can be seen in FIGS. 1a-b, taken from S. M. Sze (Ed.), “Physics of Semiconductor Devices”, 2nd ed., Wiley, 1981. pp. 182-183. Current is injected from the lateral PNP transistor Q1 into the base of vertical multicollector NPN transistor Q2. The NPN transistor Q2 is operated in inverted mode. As a consequence, the reverse beta of the NPN transistor may be too low in certain process technologies, making I2L operation not possible without process modifications. As a medium-speed technology I2L was very successful, although the advancement in MOS technology soon reduced its role for large high-speed digital circuit, such as the microprocessor we have today.
In U.S. Pat. No. 5,504,368 by Sawada a circuit device is disclosed wherein separate vertical transistors are formed for NPN high-speed operation (useful for bipolar RF operation) and NPN high reverse beta operation (useful for the I2L) and a lateral PNP transistor for the I2L injector.
German Patent No. 196 14 876 by Eichler and Wallner teaches how to integrate I2L with high-voltage NPN transistors.
In U.S. Pat. No. 5,831,328 by Yamamoto and Tominaga a fabrication process for an I2L semiconductor device is disclosed wherein polycrystalline silicon collector contacts are used to solve metal wiring problems.
In U.S. Pat. No. 6,232,193 by Chen et al. an injection logic device is disclosed wherein field oxide is used to separate the multi-collectors from each other. Polycrystalline silicon is used for contacting the collectors. A number of additional features improve the device even further.